This invention relates to a leadframe for semiconductor devices. In particular, it relates to a leadframe that provides for efficient connections between a semiconductor chip including pads for identical signals, such as power supply signals, and the leads on the leadframe.
FIG. 7 shows one-fourth of a unit of a prior art leadframe 37 for a semiconductor device. A semiconductor chip 38 is attached to a die pad 40 on the leadframe. The chip has a plurality of pads 39, some of which are coupled to leads 41 on a one-to-one basis by wires 42. As shown, 10 pads of the chip are coupled to the corresponding 10 leads of the leadframe. There are 5 unused pads on the chip.
In the prior art described above, to properly mount a semiconductor chip on the leadframe, the number of leads on the leadframe must be the same as or greater than the number of pads on the chip, even if the chip includes a number of pads for coupling to an identical signal, such as a power supply signal of the same voltage level. In other words, the number of leads on the leadframe required for coupling to the chip is solely determined by the number of pads on the chip rather than by the types of signals to which a number of the pads may be coupled, such as power supply signals or other signals. This is because each lead on the leadframe can be coupled to at most two pads. Thus, the leadframe and the chip have to accommodate one another, causing an increase in the sizes of leadframes and the chips, and an increase in costs as well as complications in the preparation of leadframes. Moreover, the prior art leadframe described above requires significantly more leads when the chip includes many groups of pads for coupling, respectively, to different types of identical signals, such as high and low voltage pads, and input and output signal pads. As a result, the physical size of the manufactured semiconductor devices may be enlarged because chips with a given number of functions may have to be mounted on a much larger leadframe with more leads. Thus, the prior art technology goes against the general trend of the industry for light weight and small size. Further, it increases costs and makes the manufactured semiconductor devices significantly less competitive.